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集成电路中的现代半导体器件(影印版)
  • 书号:9787030326652
    作者:(美)胡正明(Hu,Chenming C.)
  • 外文书名:
  • 装帧:平装
    开本:16
  • 页数:351
    字数:450000
    语种:en
  • 出版社:科学出版社
    出版时间:2012-02-01
  • 所属分类:TN3 半导体技术
  • 定价: ¥88.00元
    售价: ¥69.52元
  • 图书介质:
    电子书

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本书主要介绍与集成电路相关的主流半导体器件的基本原理,包括PN结二极管、MOSFET器件和双极型晶体管(BJT),同时介绍了与这些半导体器件相关的集成工艺制造技术。本书作者是美国工程院院士、中国科学院外籍院士,多年从事半导体器件与集成电路领域的前沿性研究工作。本书内容简明扼要,重点突出,深度掌握适宜,讲解深入浅出,理论联系实际。
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目录

  • Contents
    Preface
    1
    Electrons and Holes in Semiconductors 1
    1.1 Silicon Crystal Structure 1
    1.2 Bond Model of Electrons and Holes 4
    1.3 Energy Band Model 8
    1.4 Semiconductors, Insulators, and Conductors 11
    1.5 Electrons and Holes 12
    1.6 Density of States 15
    1.7 Thermal Equilibrium and the Fermi Function 16
    1.8 Electron and Hole Concentrations 19
    1.9 General Theory of n and p 25
    1.10 Carrier Concentrations at Extremely High and Low Temperatures 28
    1.11 Chapter Summary 29
    PROBLEMS 30
    REFERENCES 33
    GENERAL REFERENCES 34
    2
    Motion and Recombination of Electrons and Holes 35
    2.1 Thermal Motion 35
    2.2 Drift 38
    2.3 Diffusion Current 46
    2.4 Relation Between the Energy Diagram and V, 47
    2.5 Einstein Relationship Between D and u 48
    2.6 Electron-Hole Recombination 50
    2.7 Thermal Generation 52
    2.8 Quasi-Equilibrium and Quasi-Fermi Levels 52
    2.9 Chapter Summary 54
    PROBLEMS 56
    REFERENCES 58
    GENERAL REFERENCES 58
    3
    Device Fabrication Technology 59
    3.1 Introduction to Device Fabrication 60
    3.2 Oxidation of Silicon 61
    3.3 Lithography 64
    3.4 Pattern Transfer-Etching 68
    3.5 Doping 70
    3.6 Dopant Diffusion 73
    3.7 Thin-Film Deposition 75
    3.8 Interconnect-The Back-End Process 80
    3.9 Testing, Assembly, and Qualification 82
    3.10 Chapter Summary-A Device Fabrication Example 83
    PROBLEMS 85
    REFERENCES 87
    GENERAL REFERENCES 88
    4
    PN and Metal-Semiconductor Junctions 89
    Part I: PN Junction 89
    4.1 Building Blocks of the PN Junction Theory 90
    4.2 Depletion-Layer Model 94
    4.3 Reverse-Biased PN Junction 97
    4.4 Capacitance-Voltage Characteristics 98
    4.5 Junction Breakdown 100
    4.6 Carrier Injection Under Forward Bias-Quasi-Equilibrium Boundary Condition 105
    4.7 Current Continuity Equation 107
    4.8 Excess Carriers in Forward-Biased PN Junction 109
    4.9 PN Diode IV Characteristics 112
    4.10 Charge Storage 115
    4.11 Small-Signal Model of the Diode 116
    Part II: Application to Optoelectronic Devices 117
    4.12 Solar Cells 117
    4.13 Light-Emitting Diodes and Solid-State Lighting 124
    4.14 Diode Lasers 128
    4.15 Photodiodes 133
    Part III: Metal-Semiconductor Junction 133
    4.16 Schottky Barriers 133
    4.17 Thermionic Emission Theory 137
    4.18 Schottky Diodes 138
    4.19 Applications of Schottky Diodes 140
    4.20 Quantum Mechanical Tunneling 141
    4.21 Ohmic Contacts 142
    4.22 Chapter Summary 145
    PROBLEMS 148
    REFERENCES 156
    GENERAL REFERENCES 156
    5
    MOS Capacitor 157
    5.1 Flat-Band Condition and Flat-Band Voltage 158
    5.2 Surface Accumulation 160
    5.3 Surface Depletion 161
    5.4 Threshold Condition and Threshold Voltage 162
    5.5 Strong Inversion Beyond Threshold 164
    5.6 MOS C-V Characteristics 168
    5.7 Oxide Charge-A Modification to Vfb and Vt 172
    5.8 Poly-Si Gate Depletion-Effective Increasein Tox 174
    5.9 Inversion and Accumulation Charge-Layer Thicknesses and Quantum Mechanical Effect 176
    5.10 CCD Imagerand CMOS Imager 179
    5.11 Chapter Summary 184
    PROBLEMS 186
    REFERENCES 193
    GENERAL REFERENCES 193
    6
    MOS Transistor 195
    6.1 Introduction to the MOSFET 195
    6.2 Complementary MOS (CMOS) Technology 198
    6.3 Surface Mobilities and High-Mobility FETs 200
    6.4 MOSFET Vt, Body Effect, and Steep Retrograde Doping 207
    6.5 QINV in MOSFET 209
    6.6 Basic MOSFETIV Model 210
    6.7 CMOS Inverter-A Circuit Example 214
    6.8 Velocity Saturation 219
    6.9 MOSFETIV Model with Velocity Saturation 220
    6.10 Parasitic Source-Draln Resistance 225
    6.11 Extraction of the Series Resistance and the Effective Channel Length 226
    6.12 Velocity Overshoot and Source Velocity Limit 228
    6.13 Output Conductance 229
    6.14 High-Frequency Performance 230
    6.15 MOSFET Noises 232
    6.16 SRAM, DRAM, Nonvolatile (Flash) Memory Devices 238
    6.17 Chapter Summary 245
    PROBLEMS 247
    REFERENCES 256
    GENERAL REFERENCES 257
    7
    MOSFETs in ICs-Scaling, Leakage, and Other Topics 259
    7.1 Technology Scaling-For Cost, Speed, and Power Consumption 259
    7.2 Subthreshold Current-"Off" Is Not Totally "Off" 263
    7.3 Vt Roll-Off-Short-Channel MOSFETs Leak More 266
    7.4 Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage 270
    7.5 How to Reduce Wdep 272
    7.6 Shallow Junction and Metal Source/Draln MOSFET 274
    7.7 Trade-Off Between /on and /off and Design for Manufacturing 276
    7.8 Ultra-Thin-Body SoI and Multigate MOSFETs 277
    7.9 Output Conductance 282
    7.10 Device and Process Simulation 283
    7.11 MOSFET Compact Model for Circuit Simulation 284
    7.12 Chapter Summary 285
    PROBLEMS 286
    REFERENCES 288
    GENERAL REFERENCES 289
    8
    Bipolar Transistor 291
    8.1 Introduction to the BJT 291
    8.2 Collector Current 293
    8.3 Base Current 297
    8.4 Current Galn 298
    8.5 Base-Width Modulation by Collector Voltage 302
    8.6 Ebers-Moll Model 304
    8.7 Transit Time and Charge Storage 306
    8.8 Small-Signal Model 310
    8.9 Cutoff Frequency 312
    8.10 Charge Control Model 314
    8.11 Model for Large-Signal Circuit Simulation 316
    8.12 Chapter Summary 318
    PROBLEMS 319
    REFERENCES 323
    GENERAL REFERENCES 323
    Appendix I
    Derivation of the Density of States 325
    Appendix II
    Derivation of the Fermi-Dirac Distribution Function 329
    Appendix III
    Self-Consistencies of Minority Carrier Assumptions 333
    Answers to Selected Problems 337
    Index 341
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